WP=0, V=0, BAM=0
Chip Select Mask Register
V | Valid 0 (0): Chip-select is invalid. 1 (1): Chip-select is valid. |
RESERVED | no description available |
WP | Write Protect 0 (0): Write accesses are allowed. 1 (1): Write accesses are not allowed. Attempting to write to the range of addresses for which the WP bit is set results in a bus error termination of the internal cycle and no external cycle. |
RESERVED | no description available |
BAM | Base Address Mask 0 (0): The corresponding address bit in CSAR is used in the chip-select decode. 1 (1): The corresponding address bit in CSAR is a don’t care in the chip-select decode. |